Method for manufacturing a semiconductor pressure sensor

ABSTRACT

Method for manufacturing a semiconductor pressure sensor, wherein, in a silicon substrate, trenches are dug and delimit walls; a closing layer is epitaxially grown, that closes the trenches at the top and forms a suspended membrane; a heat treatment is performed so as to cause migration of the silicon of the walls and to form a closed cavity underneath the suspended membrane; and structures are formed for transducing the deflection of the suspended membrane into electrical signals.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The subject of the present invention is a method for manufacturing asemiconductor pressure sensor.

2. Description of the Related Art

As is known, a pressure sensor is a device that converts a variation inpressure into a variation of an electrical quantity (a resistance or acapacitance). In the case of a semiconductor sensor, the pressurevariation is detected by a membrane of semiconductor material, whichoverlies a cavity and is able to undergo deflection under mechanicalstress.

Pressure sensors using semiconductor technology typically find theirapplication in medicine, in household appliances, in consumerelectronics (cell-phones, PDAs-Personal Digital Assistants-), and in theautomotive field. In particular, in the latter sector, pressure sensorsare used traditionally for detecting the pressure of the types of motorvehicles, and are used by the control unit for alarm signaling. Pressuresensors are, on the other hand, also used for monitoring air-bagpressure, for controlling the breakdown pressure of the ABS, and formonitoring the pressure of oil in the engine, the pressure of injectionof the fuel, etc.

Currently existing sensors manufactured using the semiconductortechnology are basically of two types: piezoresistive and capacitivesensors.

Operation of piezoresistive sensors is based upon piezoresistivity,i.e., the capability of some materials to modify their resistivity asthe applied pressure varies. Piezoresistors are normally formed on theedge of a suspended membrane (or diaphragm) and are connected to oneanother in a Wheatstone-bridge configuration. Application of a pressurecauses a deflection of the membrane, which in turn generates a variationin the offset voltage of the bridge. By detecting the voltage variationwith an appropriate electronic circuit, it is possible to derive thedesired pressure information. An example of a piezoresistive sensor ofthe above type is described in U.S. Pat. No. 6,131,466.

Sensors of a capacitive type are based upon the change in capacitancethat occurs when a pressure is applied on a flexible membrane suspendedabove a support and separated therefrom by a region that is empty orfilled with gas (air gap). Two examples of silicon sensors of acapacitive type are described in “A MEMS-Based, High-SensitivityPressure Sensor for Ultraclean Semiconductor Applications”, A. K.Henning, N. Mourlas, S. Metz published on:http://www.redwoodmicro.com/Papers/ASMC. pdf and “Application ofHigh-Performance MEMS Pressure Sensors Based on Dissolved Wafer Process”A. Tadigadapa, S. Massoud-Ansari, published on:hftp://Iwww.mems-issys.com/pdf/issystech2.pdf.

In the case where the dielectric present between the two electrodes is avacuum, an absolute pressure sensor is obtained, whereas, if gas ispresent, which is generally introduced hermetically at a known referencepressure, the detected capacitance variation is linked to the differencebetween the external pressure and the internal pressure, and,consequently, a relative pressure sensor is obtained.

Application of a pressure causes a deflection of the membrane withconsequent reduction in its distance from the bottom electrode. In thisway, the capacitance of the pressure sensor increases. By measuring thedifference between the capacitance thus obtained and the restcapacitance (i.e., in the absence of stress), the pressure variationdetected by the sensor is obtained.

Also in this case, a circuit for processing the electrical signalsgenerated by the capacitive sensor provides the information of pressuresought.

In general, capacitive technology presents a lower current consumptionthan does piezoresistive technology. Consequently, capacitive sensorsare preferable in those applications where power consumption is animportant parameter, for example, in the automotive field, whereinaccurate control of the load power is required. Moreover, capacitivepressure sensors present smaller overall dimensions and lower costs, asis required in numerous applications.

Both piezoelectric sensors and capacitive sensors hence call for theconstruction of a cavity underneath the flexible membrane.

Currently, various solutions have been proposed:

-   -   1. use of silicon-on-insulator (SOI) substrates; for instance,        pressure sensors using this solution are described in U.S. Pat.        Nos. 5,369,544; 5,510,276 and 6,131,466;    -   2. use of porous silicon (see, for example, U.S. Pat. No.        5,242,863);    -   3. wet etching from the front (see, for example, U.S. Pat. No.        4,766,666);    -   4. wet etching from the rear, using tetramethyl ammonium        hydroxide (TMAH);    -   5. other methods (see, for example, U.S. Pat. No. 4,744,863).

In all known solutions, the use of semiconductor technology for makingcavities underneath suspended structures and layers calls for processesthat are complex, costly and, in some cases, far from compatible withthe manufacturing steps currently used in the semiconductor industry formanufacturing integrated circuits.

BRIEF SUMMARY OF THE INVENTION

One embodiment of the present invention is hence to provide amanufacturing method which will overcome the disadvantages of knownsolutions. The method comprises: providing a wafer comprising a bulkregion of semiconductor material; forming a membrane above and at adistance from said bulk region; forming a closed cavity between saidmembrane and said bulk region; and forming structures for transducingthe deflection of said membrane into electrical signals, wherein, thestep of forming a membrane includes: digging a plurality of firsttrenches in said bulk region, said first trenches delimiting a pluralityof first walls of semiconductor material; epitaxially growing, startingfrom said first walls, a closing layer of semiconductor material, saidclosing layer closing said trenches at the top and forming saidmembrane; and carrying out a heat treatment, thereby causing migrationof the semiconductor material of said first walls and forming a closedcavity.

Another embodiment of the present invention provides a pressure sensorcomprises: a bulk region of semiconductor material; a buried cavityoverlying a first part of the bulk region; and a membrane suspendedabove said buried cavity, wherein, said bulk region and said membraneare formed in a monocrystalline substrate, and in that saidmonocrystalline substrate carries structures for transducing thedeflection of said membrane into electrical signals.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

For an understanding of the present invention, preferred embodimentsthereof are now described purely by way of non-limiting example, withreference to the attached drawings, wherein:

FIG. 1 is a cross-section through a wafer of semiconductor material inan initial manufacturing step;

FIG. 2 is a top view of the wafer of FIG. 1;

FIG. 3 is a cross-section of details of FIG. 2, at an enlarged scale;

FIGS. 4-9 are cross-sections through the wafer of semiconductor materialof FIG. 1, in subsequent manufacturing steps, for a pressure sensor ofcapacitive type; and

FIG. 10 is a cross-sectional view through a wafer of semiconductormaterial for a pressure sensor of piezoelectric type.

DETAILED DESCRIPTION OF THE INVENTION

Hereinafter, an embodiment of a process for manufacturing asemiconductor material sensor of capacitive type is described. Thepresent process is based upon the process disclosed in U.S. applicationSer. No. 10/327,702 for manufacturing a SOI wafer, and, more precisely,refers to the second embodiment shown in FIGS. 11-14 of said document.

FIG. 1 shows a wafer 1 of semiconductor material, preferablymonocrystalline silicon, comprising an N-type substrate 2, designed toform the bulk of the device. A resist mask 3 (visible in the enlargeddetail of FIG. 3) is formed on the top surface of the substrate 2. Themask 3 has two circular areas, designated by 4 a and 4 b and hereinafterreferred to as sensor area and reference area, respectively. In each ofthese areas, a honeycomb lattice is defined, the two lattices being ofdifferent sizes.

In particular, as appears in the enlarged detail of FIG. 2, the sensorarea 4 a has mask regions 5 a with an hexagonal shape arranged close toone another (see also the cross-section of FIG. 3), while the referencearea 4 b has mask regions 5 a that are more widely spaced. For example,the distance t between opposite sides of the mask regions 5 a and 5 bmay be 2 μm, the distance d1 between sides facing adjacent mask regions5 a may be 1 μm, and the distance d2 between sides facing adjacent maskregions 5 b may be 2 μm.

Using the mask 3, trench etching of silicon of the substrate 2 isperformed, so forming a sensor trench 6 a and a reference trench 6 b atthe sensor area 4 a and at the reference area 4 b, respectively. Thechannels of the sensor and reference trenches 6 a, 6 b may have, forexample, a depth of approximately 10 μm, are of different width, as maybe seen in FIG. 3, and delimit silicon columns 7 a and 7 b,respectively, which are identical and have a shape at the cross sectioncorresponding to that of the mask regions 5 a and 5 b.

Next (see FIG. 4), the mask 3 is removed and an epitaxial growth isperformed in a deoxidizing environment (typically, in an atmosphere witha high concentration of hydrogen, preferably using trichlorosilaneSiHCl₃). Consequently, an epitaxial layer 10 (shown only in FIG. 4 andhereinafter not distinguished from the substrate 2) of N type, grows ontop of the silicon columns 7 a and 7 b and closes, at the top, thesensor and reference trenches 6 a, 6 b, trapping the gas present therein(here, molecules of hydrogen H₂). The thickness of the epitaxial layer10 may be, for example, 9 μm.

An annealing step is then carried out, for example for 30 minutes at1190° C.

As discussed in the aforementioned U.S. application Ser. No. 10/327,702,annealing causes a migration of the silicon atoms, which tend to arrangethemselves in lower-energy position. Consequently, at the sensor trench6 a, where the columns 7 a are arranged close together, the siliconatoms migrate completely and form a sensor cavity 11, closed at the topby a membrane 13. On account of the presence of the sensor cavity 11(having, for example, a diameter of 600 or 200 μm, according to thepressure to be applied), the membrane 13 is flexible and can bedeflected under external stresses.

On the other hand, at the reference trench 6 b, where the columns 7 bare arranged at a bigger distance from one another, the migration ofsilicon atoms causes only a thinning of the columns 7 b, hereinafterindicated as pillars 15. In practice, a labyrinthine cavity 12 isformed, wider than the reference trench 6 b. Furthermore, the pillars 15in the labyrinthine cavity 12 prevent any movement to the overlyingregion, hereinafter referred to as electrode region 14.

Preferably, annealing is performed in an H₂ atmosphere so as to preventthe hydrogen in the sensor and reference trenches 6 a, 6 b from escapingthrough the epitaxial layer 10 to the outside and so as to increase theconcentration of hydrogen in the cavities 11 and 12, should the hydrogentrapped inside during the epitaxial growth be not sufficient.Alternatively, annealing can be carried out in a nitrogen environment.

The crystallographic quality of the membrane 13 is excellent, as isevident from tests carried out by the present applicant.

Next (see FIG. 5), the membrane 13 and the electrode region 14 are dopedvia implantation of P-type dopant species, for example boron.Subsequently (see FIG. 6), an access trench 20 is dug just in theelectrode region 14, from the surface of the wafer 1 to reach as far asthe labyrinthine cavity 12. The access trench 20 preferably has theshape shown in FIG. 6, and hence extends, by stretches, near theperiphery of the area occupied by the labyrinthine cavity 12.

Thermal oxidation of the columns 7 b is then carried out so as to forman oxidized region 21 underneath the electrode region 14. The necessaryoxygen is fed to the labyrinthine cavity 12 through the access trench20. In this step, there is a gradual growth of the oxidized region 21 atthe expense of the columns 7 b and of the silicon of the substrate 2surrounding the access trench 20 and the labyrinthine cavity 12. Inparticular, the columns 7 b are completely oxidized and increase involume. As shown in FIG. 7, the labyrinthine cavity 12 and the accesstrench 20 are filled in part with thermal oxide, but remain partiallyopen (remaining portions 12′ and 20′ of the labyrinthine cavity and ofthe access trench).

Next (see FIG. 8), the remaining portions 12′ and 20′ of thelabyrinthine cavity and of the access trench are filled with insulatingmaterial 22, for example TEOS, forming, as a whole, an insulating region24. In FIG. 8, for clarity, the demarcation line between the insulatingmaterial 22 and the oxidized region 21 is represented by a dashed line.As an alternative, the labyrinthine cavity 12′ can remain empty ofinsulating material, thus avoiding the filling step.

A P-type implantation, an N-type implantation and respective diffusionsteps are then carried out in order to form contact regions 25 a, 25 bof P⁺-type above the membrane 13 and the electrode region 14 as well ascontact regions 25 c, 25 d of N⁺-type above the substrate 2 (see FIG.9). The contact regions 25 c, 25 d preferably have an annular shape andextend, respectively, around the membrane 13 and around the electroderegion 14. Next, metal contacts 26 a, 26 b, 26 c and 26 d are formed andcontact the contact regions 25 a to 25 d, respectively.

In practice, the structure of FIG. 9 forms two capacitors, designated byC1 and C0, which have, as first electrode, the membrane 13 and theelectrode region 14, respectively; as second electrode, the bulk regionunderlying the membrane 13 and the bulk region underlying the electroderegion 14, respectively; and as dielectric, the sensor cavity 11 and theinsulating region 24 (or the oxidized region 21 and the labyrinthinecavity 12′), respectively.

The capacitor C1 (referred to also as sensing capacitor) represents theelement sensitive to the pressure that is applied on the membrane 13,while the capacitor C0 (reference capacitor) represents the referenceelement, which provides the rest capacitance. Since the areas of the P/Njunctions of the sensing capacitor C1 and of the reference capacitor C0are equal, these capacitors have the same junction capacitance and thesame leakage currents. In addition, the reference capacitor C0 undergoesa trimming step at the wafer level, using one or more known capacitorsarranged in parallel and using a one-time programmable (OTP) device.

If so desired, prior to forming the contact regions 25 a-25 d, it ispossible to integrate the electronic components making up the controlcircuitry on the same chip of the pressure sensor.

Finally, in a way not shown, the wafer 1 is cut into dice, eachcontaining a sensing capacitor C1 and a reference capacitor C0 (as wellas, if envisaged, the control circuitry), and the dice are encapsulatedin such away that the membrane 13 is accessible from the outside.

Operation of the pressure sensor is described hereinafter.

If a pressure is applied on the membrane 13, the latter is deflected,reducing its distance from the bottom electrode (substrate 2).Consequently, the capacitance of the sensing capacitor C1 increases. Ifthe difference between the signal supplied by the sensing capacitor C1and the signal supplied by the reference capacitor C0 is measured via anelectronic circuit for signal processing of the “fully differential”type, there is rejection of the common-mode components and amplificationof the differential ones, and hence an indication of the pressureapplied is obtained.

The advantages afforded by the described pressure sensor emerge clearlyfrom the foregoing description. In particular, thanks to the describedmanufacturing process, the silicon pressure sensor is of low cost andreduced dimensions, and hence can be used in numerous applications wherethese requirements are important.

If so desired, it is possible to integrate on the same chip the sensingcapacitor C1 and the reference capacitor C0 and the relative controlcircuitry, thus reducing the manufacturing and assembly costs, as wellas the overall dimensions of the device.

Finally, it is clear that numerous modifications and variations may bemade to the pressure sensor described and illustrated herein, allfalling within the scope of the invention, as defined in the annexedclaims.

In particular, the described technique can be used, with just a fewmodifications, for producing a pressure sensor of a piezoelectric type.In this case, in fact, it is sufficient, during the final manufacturingsteps, for example, simultaneously with the manufacture of thecomponents of the control circuitry, to form piezoresistive elementsnear the periphery of the membrane 13. Preferably, the piezoresistiveelements are of P-type, and the membrane is of N-type. In case of apressure sensor of piezoelectric type, however, it is not necessary toprovide a reference element, and hence all the steps necessary to formthe labyrinthine cavity 12 and the insulating region 24, as well asboron implantation, are omitted. An embodiment of a pressure sensor ofpiezoelectric type is shown in FIG. 10, wherein the elements in commonwith the embodiment of FIG. 9 are designated by the same referencenumbers.

As is known, in FIG. 10 no insulating region 24 is present, andresistors 30, implanted or diffused, here of a P-type, are formed on theperiphery of the membrane 13 (of an N⁻-type). In FIG. 10, only threeresistors 30 can be seen, but it must be understood that a fourthresistor is formed in the non-visible part of the wafer 1 and isconnected to the visible resistors 30 in a bridge configuration. In FIG.10, the interconnections between the resistors 30 (typically metalregions extending above an insulating layer, not shown) are representedschematically.

As an alternative, the resistors 30 may be made of polysilicon above themembrane 13.

For a capacitive sensor, the membrane may be of any shape, for examplesquare or generically polygonal, even though the preferred shape iscircular, since it prevents any stress concentration.

The contact of the capacitors C0 and C1 with the second electrode can bemade, instead of on the front of the device, on the rear, as indicatedby the dashed line 35 in FIG. 9; in this case, it is expedient to use asubstrate 2 of N⁺-type in order to reduce the access series resistance.Also in this case, the epitaxial layer is of N⁻-type.

The shape of the columns 7 a, 7 b may vary with respect to what isillustrated. For example, they can be replaced by diaphragms ofsemiconductor material with reduced thickness, or, in general, by otherthin structures (referred to also as walls) capable of enablingmigration of silicon during the annealing step and forming the sensorcavity 11 and the labyrinthine cavity 12 (for a capacitiveimplementation).

All of the above U.S. patents, U.S. patent application publications,U.S. patent applications, foreign patents, foreign patent applicationsand non-patent publications referred to in this specification and/orlisted in the Application Data Sheet, are incorporated herein byreference, in their entirety.

From the foregoing it will be appreciated that, although specificembodiments of the invention have been described herein for purposes ofillustration, various modifications may be made without deviating fromthe spirit and scope of the invention. Accordingly, the invention is notlimited except as by the appended claims.

1. A method for manufacturing a semiconductor pressure sensor,comprising the steps of: providing a wafer comprising a bulk region ofsemiconductor material; forming a membrane above and at a distance fromsaid bulk region; forming a closed cavity between said membrane and saidbulk region; and forming structures for transducing the deflection ofsaid membrane into electrical signals; wherein, said step of forming amembrane comprises the steps of: digging a plurality of first trenchesin said bulk region, said first trenches delimiting a plurality of firstwalls of semiconductor material; epitaxially growing, starting from saidfirst walls, a closing layer of semiconductor material, said closinglayer closing said trenches at the top and forming said membrane; andcarrying out a heat treatment, thereby causing migration of thesemiconductor material of said first walls and forming a closed cavity.2. The method according to claim 1 wherein said first walls comprisecolumns with polygonal cross sections.
 3. The method according to claim1 wherein said step of carrying out a heat treatment is performed in adeoxidizing environment.
 4. The method according to claim 3 wherein saiddeoxidizing environment comprises hydrogen atoms.
 5. The methodaccording to claim 1 wherein said step of forming transducer structurescomprises forming contact structures in electrical contact with saidmembrane and with said bulk region so as to form a pressure sensor ofcapacitive type.
 6. The method according to claim 1, wherein said firstwalls are arranged at a first distance from one another, the methodfurther comprising the steps of: digging second trenches in said bulkregion adjacent to said first trenches, said second trenches delimitingsecond walls of semiconductor material, said second walls being arrangedat a second distance from one another greater than said first distance;closing said second trenches at the top through a portion of saidclosing layer; modifying the spatial arrangement of said semiconductormaterial forming said second walls and forming a labyrinthine cavitydelimiting pillars of semiconductor material; and forming an insulatingregion in said labyrinthine cavity.
 7. The method according to claim 6wherein said step of digging second trenches is carried outsimultaneously to said step of digging first trenches.
 8. The methodaccording to claim 6 wherein said step of forming an insulating regioncomprises the steps of: oxidizing said pillars through openings formedin said portion of said closing layer; and filling said labyrinthinecavity with insulating material.
 9. The method according to claim 6wherein said step of forming transducer structures comprises: formingfirst contact structures, electrically connected to said membrane;forming second contact structures, electrically connected to saidportion of said closing layer; and forming third contact structures,electrically connected to said bulk region.
 10. The method according toclaim 1 wherein said step of forming transducer structures comprisesforming resistive elements carried by said membrane.
 11. The methodaccording to claim 10 wherein said membrane has a first conductivitytype, and said step of forming resistive elements comprises introducingionic dopant species of a second conductivity type within said membrane.12. The method according to claim 10 wherein said step of formingtransducer structures further comprises the step of electricallyconnecting said resistive elements in a bridge configuration.
 13. Asemiconductor pressure sensor, comprising: a bulk region ofsemiconductor material; a buried cavity overlying a first part of thebulk region; and a membrane suspended above said buried cavity, wherein,said bulk region and said membrane are formed in a monolithic substrate,and in that said monolithic substrate carries structures for transducingthe deflection of said membrane into electrical signals.
 14. Thepressure sensor according to claim 13, of capacitive type, wherein saidbulk region and said membrane form electrodes of a capacitive sensingelement, and said transducer structures comprise contact structures inelectrical contact with said membrane and with said bulk region.
 15. Thepressure sensor according to claim 14 wherein said bulk region has afirst conductivity type, and said membrane has a second conductivitytype.
 16. The pressure sensor according to claim 14 wherein saidmonolithic substrate accommodates a capacitive reference elementarranged adjacent to said capacitive sensing element.
 17. The pressuresensor according to claim 16 wherein said capacitive reference elementcomprises: an insulating region overlying a second part of the bulkregion, said second part of the bulk region being adjacent to saidburied cavity overlying the first part of the bulk region; and anelectrode region overlying said insulating region and adjacent to saidmembrane.
 18. The pressure sensor according to claim 17 wherein saidmembrane and said electrode region have a circular or polygonal shape.19. The pressure sensor according to claim 17 wherein said contactstructures comprise: a first metal region, in contact with saidmembrane; a second metal region, extending outside said membrane and indirect electrical contact with said bulk region; and a third metalregion, in contact with said electrode region.
 20. The pressure sensoraccording to claim 13, of piezoelectric type, wherein said transducerstructures comprise piezoresistive elements carried by said membrane,and contact structures in electrical contact with said piezoresistiveelements.
 21. The pressure sensor according to claim 20 wherein the bulkregion has a first conductivity type and the piezoresistive element hasa second conductivity type.
 22. The pressure sensor according to claim20 the bulk region and the membrane are monocrystalline silicon, and thepiezoresistive element is polysilicon.
 23. A semiconductor pressuresensor comprising: a common substrate of a semiconductor material; asensing capacitor including a sensor cavity within a first part of thecommon substrate, a deflectable membrane overlying and closing thesensor cavity, said membrane being made of the semiconductor material,and a reference capacitor including an insulating region within a secondpart of the common substrate, the insulating region being adjacent tothe sensor cavity and having a plurality of cavities, and an electroderegion of the semiconductor material overlying the insulating region.24. The semiconductor pressure sensor of claim 23, wherein the substrateis of first conductivity type, and the membrane and electrode region areof second conductivity type.
 25. The semiconductor pressure sensor ofclaim 23 wherein the sensor cavity is filled with hydrogen gas.
 26. Thesemiconductor pressure sensor of claim 23 wherein the plurality ofcavities in the insulating region are filled with an insulatingmaterial.
 27. The semiconductor pressure sensor of claim 23 furthercomprising: a first contact region formed in said membrane, a secondcontact region formed in said bulk region surrounding the membrane; athird contact region formed in said electrode region, and a fourthcontact region formed in said bulk region surrounding the electroderegion.
 28. The semiconductor pressure sensor of claim 23 wherein themembrane forms a first electrode.
 29. The semiconductor pressure sensorof claim 23 wherein the common substrate underlying both the sensingcapacitor and the reference capacitor forms a bottom electrode for thepressure sensor.
 30. A semiconductor pressure sensor comprising: asensing capacitor having a first electrode and a first dielectric regionunderlying the first electrode; a reference capacitor having a secondelectrode and a second dielectric region underlying the secondelectrode; and a semiconductor substrate underlying the first and seconddielectric regions and forming a bottom electrode; wherein, the firstelectrode is a deflectable membrane and the first dielectric region is acavity filled with a gas.
 31. The semiconductor pressure sensor of claim30 wherein the second dielectric region is an insulating region.
 32. Thesemiconductor pressure sensor of claim 30 wherein the first and secondelectrodes are of a first conductivity type and the semiconductorsubstrate is of a second conductivity type.
 33. The semiconductorpressure sensor of claim 30 wherein the first and second electrodesshare a monocrystalline structure with the substrate.
 34. Thesemiconductor pressure sensor of claim 30 wherein the gas is hydrogengas.
 35. The semiconductor pressure sensor of claim 30 furthercomprising: a first contact region formed in said first electrode; asecond contact region formed in said substrate surrounding the firstelectrode; a third contact region formed in said second electrode; and afourth contact region formed in said substrate and surrounding thesecond electrode.